Abstract
This chapter discusses the common fundamental characteristics of digital signal processors. Most of the digital signal processing (DSP) chips are single processor devices. There exist chips that integrate multiple DSP processors on the same chip whereas others combine a DSP processor with a microcontroller. Some manufacturers offer DSP cores that are intended to be used as building blocks in creating a semi-custom chip. This allows the designer to integrate a programmable DSP and other custom circuitry onto a single application-specific integrated circuit (ASIC). The DSP core cuts design time and is most useful for high volume production designs for specific applications in areas such as telecommunications. In some cases, the vendor providing the core is also the foundry fabricating the ASIC. In other cases, the vendor simply licenses the core design to the customer, who then selects an appropriate foundry. All DSP chips have a multiplier that can multiply two native-sized data in a single instruction cycle. All DSP chips have a multiplier that can multiply two native-sized data in a single instruction cycle. But different designs lead to different characteristics. Most DSP chips implement what is known as the Harvard architecture, or multiple bus structure, one for program instructions and two for data.
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The different versions of the original document can be found in:
- http://digital-library.theiet.org/content/journals/10.1049/ep.1986.0081,
- http://ieeexplore.ieee.org/iel5/5176125/5187812/05188223.pdf,
- https://academic.microsoft.com/#/detail/2085946880
- https://api.elsevier.com/content/article/PII:B9780750623032500102?httpAccept=text/plain,
- http://dx.doi.org/10.1016/b978-0-7506-2303-2.50010-2 under the license https://www.elsevier.com/tdm/userlicense/1.0/
- https://api.elsevier.com/content/article/PII:B9780750657983500096?httpAccept=text/plain,
- http://dx.doi.org/10.1016/b978-075065798-3/50009-6 under the license https://www.elsevier.com/tdm/userlicense/1.0/
- https://api.elsevier.com/content/article/PII:B9780750674447500650?httpAccept=text/plain,
- http://dx.doi.org/10.1016/b978-0-7506-7444-7/50065-0 under the license https://www.elsevier.com/tdm/userlicense/1.0/
- https://api.elsevier.com/content/article/PII:B9780750699921500061?httpAccept=text/plain,
- http://dx.doi.org/10.1016/b978-075069992-1/50006-1 under the license https://www.elsevier.com/tdm/userlicense/1.0/
- https://patents.google.com/patent/EP0122117A2/en,
- https://www.freepatentsonline.com/EP0122117.html,
- http://www.freepatentsonline.com/EP0122117.html,
- https://lens.org/170-440-186-005-292,
- https://academic.microsoft.com/#/detail/2416574006
- https://digital-library.theiet.org/content/books/10.1049/pbel011e_ch13,
- https://www.sciencedirect.com/science/article/pii/B9780750699921500061,
- https://academic.microsoft.com/#/detail/2418349517
DOIS: 10.1002/047120059x.ch17 10.1201/9781420007909-7 10.1016/b978-0-7506-7444-7/50065-0 10.1016/b978-0-7506-8976-2.00008-0 10.1142/9789812775047_0014 10.1016/b978-075065798-3/50009-6 10.1049/ep.1986.0081 10.1049/pbel011e_ch13 10.1016/b978-075069992-1/50006-1 10.1016/b978-0-7506-2303-2.50010-2
Document information
Published on 01/01/2017
Volume 2017, 2017
DOI: 10.1002/047120059x.ch17
Licence: Other
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