Minimization of indirect addressing for edge‐based field solvers

Abstract

A point renumbering scheme that halves the number of indirect addressing operations required for edge-based field solvers has been developed. At the same time, an alternative (and entirely serendipitous) assembly of right-hand side vectors was found to enhance performance considerably. The new loop structure is especially attractive for vector-parallel machines with direct memory access. Timings on the CRAY-SV1 and NEC-SX5 show that for Laplacian loops, which appear in many CFD and CEM codes, CPU can be reduced considerably. The new renumbering scheme does not require any new data structures or arrays, allowing for progressive porting of loops in large-scale production codes.

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