The implementation of a dual image processing pipeline camera on a state-of-art FPGA system is described. This camera can simultaneously acquire dual images of a scene and process, analyze and merge both images to enable a range of real-time image enhancement algorithms to be explored. Several examples of image enhancement algorithms implemented on the prototype camera are described. non-peer-reviewed
The different versions of the original document can be found in:
Published on 01/01/2011
Volume 2011, 2011
DOI: 10.1109/icce.2011.5722837
Licence: Other
Are you one of the authors of this document?