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Latest revision as of 17:19, 3 February 2021
Abstract
International audience; A deeply pipelined and parallel LDPC decoder architecture is proposed in this paper. The main feature of this architecture is the ∆-update scheme, which relaxes the data dependency requirement and allows for deeper pipelines than typical decoders. The proposed architecture also has the flexibility to handle a large number of codes. Frame error rate performance is shown for three codes with different quantization parameters. Finally, the impact of pipeline depth on processing time and on the energy-delay product (EDP) is evaluated from post-synthesis results. The results show that the ability to have deeper pipelines can lead to large reductions in EDP.
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Published on 01/01/2020
Volume 2020, 2020
DOI: 10.1109/newcas49341.2020.9159808
Licence: CC BY-NC-SA license
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