Latest revision as of 17:08, 3 February 2021

Abstract

This paper presents a systematic approach for microarchitectural exploration in pipelined asynchronous systems, with the goal of achieving a specified throughput target while minimizing a given cost function (based on energy, area, etc.). The method includes a general framework that (i) allows for a rich extensible set of microarchitectural transformations for improving throughput; and (ii) can handle a variety of cost functions, such as area, energy, $E\tau^2$ and the energy-area product.In general, the space of transformations that can be applied to a given circuit is potentially infinite because an arbitrarily long sequence of transformations may be applicable. To compound the challenge, the value of the given cost function can change non-monotonically as successive transformations are applied (e.g., some transformations increase area, while others decrease area), thereby making it difficult to apply a typical branch-and-bound approach to prune the search space. Our method employs simple but effective heuristic search strategies (including greedy, look ahead, and breadth-first). A key contribution is to identify commutativity of certain transformations, thereby pruning the design space significantly. The approach was automated and applied to a number of examples. Various throughput targets were assumed: from 50\% to 20x throughput improvement. In each example, the approach was successful in meeting the throughput target.

Original document

The different versions of the original document can be found in:

• http://www.cs.columbia.edu/%7Eggill/papers/async10.pdf

• http://www.cs.columbia.edu/~ggill/papers/async10.pdf,

http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000005476976,

https://dblp.uni-trier.de/db/conf/async/async2010.html#GillS10,

https://academic.microsoft.com/#/detail/2040723997

• http://xplorestaging.ieee.org/ielx5/5476381/5476957/05476976.pdf?arnumber=5476976,

http://dx.doi.org/10.1109/async.2010.15