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Abstract

International audience; This paper introduces a new methodology for determining the minimum number of registers needed to pipeline a linear asynchronous pipeline so that the final cycle time meets some constraints. Moreover, the methodology defines the optimum placing for the registers; ends with an optimally pipelined circuit.


Original document

The different versions of the original document can be found in:

http://dx.doi.org/10.1109/rme.2008.4595712
https://ieeexplore.ieee.org/document/4595712,
https://academic.microsoft.com/#/detail/2156754801
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Published on 01/01/2008

Volume 2008, 2008
DOI: 10.1109/rme.2008.4595712
Licence: CC BY-NC-SA license

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