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Abstract
ISBN : 978-1-4244-2182-4; International audience; This paper introduces a new methodology for optimizing the performance of Asynchronous-Linear Pipelines. The method supports all delay types, static and variable time delays, enabling the designers to optimize their architecture taking into account the timing information of data dependencies, circuit structure and process variations. The method not only determines the minimum degree of pipelining necessary to satisfy a given performance target, but also computes the optimum placement of the pipeline stages to maximize the throughput.
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Published on 01/01/2008
Volume 2008, 2008
DOI: 10.1109/icecs.2008.4675095
Licence: CC BY-NC-SA license
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