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Revision as of 13:19, 14 October 2020
Abstract
Pipeline morphing is a simple but effective technique for reconfiguring pipelined FPGA designs at run time. By overlapping computation and reconfiguration, the latency associated with emptying and refilling a pipeline can be avoided. We show how morphing can be applied to linear and mesh pipelines at both word-level and bit-level, and explain how this method can be implemented using Xilinx 6200 FPGAs. We also present an approach using morphing to map a large virtual pipeline onto a small physical pipeline, and the trade-offs involved are discussed.
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Published on 01/01/2010
Volume 2010, 2010
DOI: 10.1007/3-540-63465-7_216
Licence: CC BY-NC-SA license
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